CS471 --  Design of Computer Processors       instructor: Dr. M. Chang

                       Maxplus2 Design Environment

1. Name your project
       - the project name (e.g. mux) must be the same as the file name.
       - Go to File select Project then Name
       - Enter the name then click OK

2. Edit your design
	(a) for VHDL code (for CS471)
       - Go to File select New and then choose the Text Editor file and click OK.
       - Now you are in the text editor mode
       - Enter your VHDL code
       - Go to File select Save As
       - Specify the file name (e.g. mux.vhd) the file name must be the same as the entity name. Make sure the extention to your file name is .vhd

	(b) for schematic capture (for CS350)
       - Go File menu and select New and then choose an editor
           (e.g. Graphic Editor File)
       - Edit your file
       - Save it with a proper file name (e.g. adder.gdf)

3. Compilation
       - Go to MAX+PLUS II, select Compiler.
       - Go to Assign and select Device and choose the device type (e.g. EPF10K20RC240-4) then click OK
       - For timing simulation go to Processing and select the Timing SNF extracor
       - Go to the compiler window and press start

4. Simulation
     a. Specify the stimulas and the output responses in the Simulation Channel File ( e.g. mux.scf or adder.scf)
       - Go to File select New and select Waveform editor file then click OK
       - Go to Node select Enter nodes from SNF
       - Click the List button
       - Select the input/output signals, then click OK
       - You can specify your input signal values by clicking the right mouse button and dragging it to the desired range.
       - Go to File select SaveAs
       - Enter the file name with a .scf extention and click OK

      b. Simulation
       - Go to MAX+PLUS II and select Simulator and click Start
       - After the simulation is complete click the Open SCF button

      c. Include the buried signals

      d. Simulation range
       - Go to File and Select Endtime
       - Specify the simulation range and click OK

      e. Delay Matrix (static timing analysis)
       - Go to MAX+PLUS II and select the Timing Analyzer
       - Press Start

5. Programmer
    a. Go to Assign menu and select Back-annotate project then
           check "chips, pins, & devices" botton
    b. Go to Assign menu and select Pin/Location/Chip then
           specify signals to pins (the pin assignments are described in 6.) 
    c. Recompile your program
    d. Programmer
           - Go to MAX+plus II menu then programmer
           - Go to JTAG menu and check Multi-device JTAG chain
           - Go to JTAG menu and select Multi-device JTAG chain setup
           - Select Device name and Programming file name (Flex: .sof,
             Max: .pof) then add to device name and Programming file
             name window
           - Press Detect JTAG chain info botton (confirmed by
             hardware check)
           - Go back to Programmer window and press program for Max,
             configure for Flex

5. Floor plan editor

6. Pin Assignemnts (for FLEX10K20 Device)
***  inputs *****
a. on-board oscillator (@25.175MHz) is connected to pin 91.
b. push-buttons (active-low):
	FLEX_PB1	28
	FLEX_PB2	29
c. Dip Switches (logic 1 when the swtich is open; logic 0 when the swtich is close)
	FLEX_SWITCH-1	41
	FLEX_SWITCH-2	40
	FLEX_SWITCH-3	39
	FLEX_SWITCH-4	38
	FLEX_SWITCH-5	36
	FLEX_SWITCH-6	35
	FLEX_SWITCH-7	34
	FLEX_SWITCH-8	33

***  Outputs *****
d. Dual-digit seven-segment display (active-low; logic 0 to turn on the LED)
	Display Segment		pin for digit 1		pin for Digit 2
		a			6			17
		b			7			18
		c			8			19
		d			9			20
		e			11			21
		f			12			23
		g			13			24
		Decimal point		14			25
note: the "digit 1" refers to the LED digit on the left.
note: the names associated with the seven-segment display: 
      a
    -----
   f| g |b
    -----
   e|   |c  
    ----- o (Decimal point)
      d