Circuit design for cortical implants invariably requires the use of custom application-specific integrated circuits (ASICs) and a high-efficiency trancutaneous inductive link. In designing the Visual Prosthesis we have developed transmitter and ASIC designs that could be used for any cortical implant.
Transmitter Topology
The external transmitter, that drives the Visual Prosthesis extra-corporeal inductive link coil is based upon IIT’s patented closed-loop, suspended-carrier Class-E technologies. Using these methods, it is possible to design a transmitter that can produce large currents in a high-Q coil at radio frequencies. Using the suspended carrier method of data modulation, we can instantaneously turn on and off the current in the transmitter coil, producing a high-bandwidth data link. Using 4 carrier cycles per bit, the Visual Prosthesis system will be capable of a data-rate in excess of 1 Mbit/sec.
Figure 10, below, shows a typical set of Class-E waveforms. The advantage of the Class-E system is that the switched solid-state driver has little to no power dissipation due to a unique driving condition. In Figure 10, that the mosfet drain voltage is close to zero during the time that the gate-drive is high. This results in extremely low power dissipation in the switch even for high currents. The closed-loop control, from the current-sense transformer, maintains operation of the converter at the correct frequency, for minimal power loss, even as the characteristics of the transmitter coil vary. The loss and inductance of the transmitter coil can change due to the presence of metal objects, or deformations of the coil shape.
By virtue of size limitations, cortical implants require the design and fabrication of custom ASICs. We have chosen the AMI low-noise analog BiCMOS process for fabrication of the Visual Prosthesis ASICs.
In the Visual Prosthesis, each electrode is driven by a an individual electrode digital-to-analog current driver (DAC). The design of precision biphasic, DAC cells is critical to the success of the Visual Prosthesis. The cortical microelectrodes must be driven from highly charge-balanced current sources to avoid electrode deterioration. Our DAC cells maintain constant current and charge balance with extremely low compliance voltages - on the order of less than 0.5 volts. Our 8-channel Block Chip ASIC is shown in Figure
11.
8 Channel Block Chip ASIC
Each DAC cell is comprised of a reference-controlled 7-bit biphasic current driver with a range of 0 - 64 uA (0.5 uA steps), and a 4-bit pulse-width timer to produce stimulation pulses from 0-750 uSec (50 uSec steps). Amplitude and pulse-width data from the Logic and Digital Controller Chip are stored for each electrode in the individual DAC cells.
